Compiler Solutions for Deep Learning Accelerators
More than hundred of deep learning accelerators (DLAs) are available on the market in the beginning of 2018. The mainstream AI frameworks such as TensorFlow and Caffe are designed only for CPUs and GPUs, that is, most DLA vendors lack functional support for their designed ASICs. DLA vendors need to reinvent the wheels by implanting AI framework every time they design a new ASICs. It is a tedious and error-prone process which may lead to delay of your product launch date.
These problems can be attributed to a lack of performance cost model in current AI frameworks. Performance model describes variety of physical features, such as memory size, configuration of bus systems, clock cycle of tensor operators, and so on. Every DLA chip has its own unique cost model. Compilers can use these model to optimize programs with identical, abstract algorithms.
Skymizer provides a new generation of compiler to describe variant of performance cost models. Our compiler is based on Open Neural Network Exchange Format (ONNX). It is designed by define-use chain which provides you insights in analyzing the liveness range of each tensor. Our compiler also provides rich analysis passes to help DLA vendors customize their own performance cost models. You can simply modify the cost model and port to different kinds of DLA in a short time. Our compiler helps you achieve high performance and shorten your development time.
Skymizer provides your compiler consultants to enhance your deep learning accelerator. Our mission is to continuously improve and deliver high-quality compiler and VM to hardware and software companies.
- Landing Skymizer Neural Network Compiler for your deep learning accelerators
- Designing optimization algorithms for your deep learning accelerators